Home » Uncategorized » Broadcom introduces all DSP 40nm 10GbE SFP+ PHYs/ClariPhy granted patents enabling standards-based testing of networking components

Broadcom introduces all DSP 40nm 10GbE SFP+ PHYs/ClariPhy granted patents enabling standards-based testing of networking components

MARCH 31, 2010 — Broadcom Corp., maker of semiconductors for wired and wireless communications, announced its 40 nanometer (nm) quad-channel 10 Gigabit Ethernet (10GbE) physical layer (PHY) devices. The products are designed to provide ultra low power consumption and savings of approximately 30 percent over competing 65nm CMOS solutions, says a representative.

The Broadcom BCM84750 series enables the convergence of 10GbE and Fibre Channel equipment in the data center supporting unified networking and storage applications, as well as high-density, high-bandwidth server applications, scaled to support 40 Gigabit Ethernet (40GbE) and 100 Gigabit Ethernet (100GbE) designs in the future.

Utilizing Broadcom’s digital signal processing (DSP) technology, the BCM84750 series of quad all-DSP 10GbE PHYs enables IT professionals to preserve existing fiber infrastructures by providing an upgrade path from 1 Gigabit Ethernet (1GbE) to 10GbE and beyond, up to 40GbE. Company executives anticipate this DSP technology, coupled with the 40nm design, will help drive the transition to 10GbE by leveraging the cost-effective SFP+ standard.

MARCH 30, 2010 — ClariPhy Communications Inc., a fabless semiconductor company specializing in high-speed communications ICs, won two United States patents covering testing of key components in high-speed networking links.

The patents cover inventions using Waveform and Dispersion Penalty (WDP) and Transmitter Waveform and Dispersion Penalty (TWDP) performance metrics. This technology was first adopted in the IEEE 802.3 10 Gigabit (10G) Ethernet standard, applying to 10GBASE-LRM transmission on multimode fiber networks. Extensions of this technology were later widely adopted into several other standards, including SFF-8431 covering SFP+ modules, FC-PI-5 covering Fibre Channel serial links, and SAS-2 and SAS-2.1, covering Serial Attached SCSI physical interconnects. In addition, it is currently being considered by other standards bodies.

The inventions, covered by US patents 7,643,752 and 7,664,394, describe a method to test transmitters and a method to test intermediate components when the final receiver includes an equalizer. The methods distinguish between impairments that the equalizer can compensate and those that it cannot compensate.

In addition to the patents granted and pending, ClariPhy holds copyrights on the MATLAB code used to describe the underlying algorithm. ClariPhy has agreed to license the intellectual property required to practice various standards under a reasonable and nondiscriminatory basis.

Leave a Reply

Your email address will not be published. Required fields are marked *


WordPress spam blocked by CleanTalk.